Year Core Architecture Diagram SOC
ExampleSBC
Example(s) 2003 ARMv6Broadcom BCM2835, BCM21553
VIA WonderMedia WM87x0Raspberry Pi A, A+, B, B+, Odroid-W
Via APC 8750 2005 ARMv7-ATexas Instruments Sitara AM335x, OMAP 3
Allwinner A10, A13
Apple A4
Freescale i.MX5x
Rockchip RK2918, RK2906
Samsung Exynos 3110, S5PC110, S5PV210
ZiiLABS ZMS-08BeagleBone Black
Cubieboard, Gooseberry 2007 ARMv7-AFreescale i.MX6x
Actions ATM702x, ATM703x
Altera Cyclone V,
Arria V/10
Amlogic AML8726, MX, M6x, M801, M802/S802, S812, T866
Apple A5, A5X
Broadcom VideoCore BCM21xxx, BCM28xxx
HiSilicon K3V2
Leadcore LC1810, LC1811
MediaTek MT65xx
Nvidia Tegra, 2, 3, 4i
Nufront NuSmart 2816M, NS115, NS115M
Renesas EMMA EV2, R-Car H1, RZ/A
Rockchip RK292x, RK30xx, RK31xx
Samsung Exynos 4
ST-Ericsson NovaThor
Telechips TCC8803
Texas Instruments OMAP 4
VIA WonderMedia WM88x0, 89x0
Xilinx Zynq-7000
ZiiLABS ZMS-20, ZMS-40CuBox, HummingBoard, Udoo 2009 ARMv7-AAmlogic M805/S805
Actions Semiconductor ATM702x
Atmel SAMA5D3
Qualcomm Snapdragon S4 Play, 200
InfoTMIC iMAPx820, iMAPx15
Telechips TCC892xOdroid-C1, C1+
The Nvidia Tegra K1, as used in the Jetson TK1, is made using an ARM Cortex-A15 quad-core CPU and a Kepler SMX GPU (comparable with a GeForce GTX 770 in features and of 300 GFLOP power)
Year Cortex
Application
CoreArchitecture Diagram SOC
ExampleSBC
Example(s) 2010 ARMv7-A nVidia Tegra 4, K1
Allwinner A80
HiSilicon K3V3
MediaTek MT6599
Nvidia Tegra 4, K1
Renesas R-Car H2
Samsung Exynos 5
Texas Instruments OMAP 5, DRA7xx
Input voltage is 12V, power consumption (idle-max): 3-12W
Features : Thumb / Thumb-2 / DSP / VFPv4 FPU / NEON / integer divide / fused MAC / Jazelle RCT
Pipeline : 15 stage integer/17–25 stage floating point pipeline, with out-of-order speculative issue 3-way superscalar execution pipeline.
3.5-4.0 DMIPS/MHz, giving
floating point MIPS (Whetstone) per CPU, integer MIPS (Dhrystone) per CPU
You don't see many of these high powered ARM SOCs on their own, most Cortex-A15 cores are found in a big.LITTLE implementation, a power-optimization technology where the high-performance 'big' Cortex-A15 cores are combined with more efficient 'LITTLE' CPU cores (the Cortex-A7) to deliver peak-performance capacity, higher sustained performance and increased parallel processing performance at significantly lower average power. Examples are the Samsung Exynos 5 Octa's and the Allwinner A80.
Year Cortex
Application
CoreArchitecture Diagram SOC
ExampleSBC
Example(s) 2011 ARMv7-A Allwinner-A2x, A3x, H3
Broadcom VideoCore BCM2836, BCM23550
Freescale QorIQ LS10xx
Leadcore LC1813, LC1913
Marvell Armada PXA1920
MediaTek MT65xx
Qualcomm Snapdragon 200, 400